This is a Master-Slave Edge Triggered D flip flop.
- Makes it so that one input is not outputted more than once per Clock cycle.
- Edge Triggered
- On rising edge of Clock → Leader Register records input
- Top of Clock → Leader outputs whatever it recorded, Follower Register outputs whatever the Leader outputs
- Clock falls → Follower records its inputs
- Bottom of Clock → Leader outputs its inputs again, Follower outputs what it recorded
